本书以Intelx86和ARM两个处理器系列为例，深入讨论了计算机组成与体系结构的基本原理和实现，并将它们运用到当代的设计问题中。

部分　引言 章　基本概念和计算机演化1 1.1　组成与体系结构2 1.2　结构与功能3 1.3　计算机简史11 1.4　Intel x86体系结构的演化27 1.5　嵌入式系统29 1.6　ARM体系结构33 1.7　云计算39 1.8　关键词、复习题和练习题42 2章　性能问题45 2.1　优化性能设计46 2.2　多核、MIC和GPGPU52 2.3　深刻理解性能的两个定律：A*dahl定律和Little定律53 2.4　计算机性能的基本度量56 2.5　计算均值59 2.6　基准测试和SPEC67 2.7　关键词、复习题和练习题74 二部分　计算机系统 3章　计算机功能与互连的顶层视图80 3.1　计算机组件81 3.2　计算机功能83 3.3　互连结构99 3.4　总线互连0 3.5　点对点互连2 3.6　PCI Express7 3.7　关键词、复习题和练习题116 4章　高速缓存120 4.1　计算机存储系统概述121 4.2　高速缓存存储器原理128 4.3　高速缓存设计要素131 4.4　Pentium 4 高速缓存结构149 4.5　关键词、复习题和练习题152 附录4A　两级存储的性能特征157 5章　内部存储器165 5.1　半导体主存166 5.2　纠错174 5.3　DDR DRAM180 5.4　闪存185 5.5　新的易失性固态存储器技术187 5.6　关键词、复习题和练习题190 6章　外部存储器194 6.1　磁盘195 6.2　RAID204 6.3　固态硬盘212 6.4　光学存储器217 6.5　磁带222 6.6　关键词、复习题和练习题224 7章　输入/输出228 7.1　外部设备230 7.2　I/O模块232 7.3　可编程I/O235 7.4　中断驱动的I/O239 7.5　直接存储器访问248 7.6　直接高速缓存访问254 7.7　I/O通道和处理器261 7.8　外部互连标准263 7.9　IBM zEnterprise EC12 I/O系统266 7.　关键词、复习题和练习题270 8章　作系统支持275 8.1　作系统概述276 8.2　调度287 8.3　存储管理293 8.4　Intel x86存储管理304 8.5　ARM存储管理309 8.6　关键词、复习题和练习题314 三部分　算术与逻辑 9章　数字系统318 9.1　十进制系统319 9.2　按位记数系统320 9.3　二进制系统321 9.4　二进制与十进制的转换321 9.5　十六进制表示324 9.6　关键词和练习题326 0章　计算机算术运算328 .1　算术与逻辑单元329 .2　整数表示330 .3　整数算术运算335 .4　浮点表示350 .5　浮点算术运算358 .6　关键词、复习题和练习题367 1章　数字逻辑372 11.1　布尔代数373 11.2　门376 11.3　组合电路378 11.4　时序电路396 11.5　可编程逻辑设备405 11.6　关键词和练习题409 四部分　中央处理单元 2章　指令集：特点与功能412 12.1　机器指令特点413 12.2　作数类型420 12.3　Intel x86和ARM的数据类型422 12.4　作类型425 12.5　Intel x86和ARM的作类型438 12.6　关键词、复习题和练习题446 附录12A　小端序、大端序和双端序452 3章　指令集：寻址模式与格式456 13.1　寻址模式457 13.2　x86和ARM的寻址模式463 13.3　指令格式469 13.4　x86和ARM指令格式477 13.5　汇编语言482 13.6　关键词、复习题和练习题484 4章　处理器结构与功能488 14.1　处理器组成489 14.2　寄存器组成491 14.3　指令周期496 14.4　指令流*线500 14.5　x86处理器系列517 14.6　ARM处理器524 14.7　关键词、复习题和练习题530 5章　精简指令集计算机535 15.1　指令执行特性537 15.2　大寄存器文件的使用542 15.3　基于编译器的寄存器优化547 15.4　精简指令集架构549 15.5　RISC流*线555 15.6　MIPS R4000559 15.7　SPARC565 15.8　RISC与CISC之争570 15.9　关键词、复习题和练习题571 6章　指令级并行与超标量处理器575 16.1　概述576 16.2　设计问题581 16.3　 Intel Core微架构591 16.4　ARM Cortex-A8596 16.5　ARM Cortex-M3604 16.6　关键词、复习题和练习题608 五部分　并行结构 7章　并行处理613 17.1　多处理器结构615 17.2　对称多处理器617 17.3　高速缓存一致性和MESI协议621 17.4　多线程和*上多处理器628 17.5　集*633 17.6　均匀内存访问640 17.7　云计算643 17.8　关键词、复习题和练习题650 8章　多核计算机656 18.1　硬件性能问题657 18.2　软件性能问题660 18.3　多核结构665 18.4　异构多核结构667 18.5　Intel Core i7-990X676 18.6　ARM Cortex-A15 MPCore677 18.7　IBM zEnterprise EC12机682 18.8　关键词、复习题和练习题685 9章　通用图形处理单元688 19.1　CUDA基础689 19.2　GPU与CPU691 19.3　GPU架构概述692 19.4　Intel的Gen8 GPU701 19.5　何时把GPU当作协处理器使用704 19.6　关键词和复习题706 六部分　控制单元 20章　控制单元作707 20.1　微作708 20.2　处理器的控制714 20.3　硬布线实现724 20.4　关键词、复习题和练习题727 21章　微程序控制729 21.1　基本概念730 21.2　微指令序列739 21.3　微指令执行745 21.4　TI 8800755 21.5　关键词、复习题和练习题766 附录A　计算机组成与体系结构教学项目768 附录B　汇编语言与相关主题774 参考文献800 Contents Foreword ii Preface xv About the Author xii PART ONE INTRODUCTION 1 Chapter.1 Basic Concepts and Computer Evolution 1 1.1 Organiz*ion and Archite*ure 2 1.2 Stru*ure and Fun*ion 3 1.3 A Brief History of Compute* 11 1.4 The Evolution of the Intel x86 Archite*ure 27 1.5 Embedded Systems 29 1.6 Arm Archite*ure 33 1.7 Cloud Computing 39 1.8 Key Terms, Review Questions, and Problems 42 Chapter.2 Perfor*nce Issues 45 2.1 Designing for Perfor*nce 46 2.2 Multicore, Mics, and GPGPUs 52 2.3 Two Laws th* Provide Insight:A*dahl’s Law and Little’s Law 53 2.4 Basic Measures of Computer Perfor*nce 56 2.5 Calcul*ing the Mean 59 2.6 Bench*rks and Spec 67 2.7 Key Terms, Review Questions, and Problems 74 PART TWO THE PUTER SYSTEM 80 Chapter.3 A Top-Level View of Computer Fun*ion and Interconne*ion 80 3.1 Computer Components 81 3.2 Computer Fun*ion 83 3.3 Interconne*ion Stru*ures 99 3.4 Bus Interconne*ion 0 3.5 Point-to-Point Interconne* 2 3.6 PCI Express 7 3.7 Key Terms, Review Questions, and Problems 116 Chapter.4 Cache Memory 120 4.1 Computer Memory System Overview 121 4.2 Cache Memory Principles 128 4.3 Elements of Cache Design 131 4.4 Pentium 4 Cache Organiz*ion 149 4.5 Key Terms, Review Questions, and Problems 152 Appendix 4A Perfor*nce Chara*eristics of Two-Level Memories 157 Chapter.5 Internal Memory 165 5.1 Semicondu*or Main Memory 166 5.2 Error Corre*ion 174 5.3 DDR DRAM 180 5.4 Flash Memory 185 5.5 Newer Nonvol*ile Solid-St*e Memory Techogies 187 5.6 Key Terms, Review Questions, and Problems 190 Chapter.6 External Memory 194 6.1 Magic Disk 195 6.2 RAID 204 6.3 Solid St*e Drives 212 6.4 Optical Memory 217 6.5 Magic Tape 222 6.6 Key Terms, Review Questions, and Problems 224 Chapter.7 Input/Output 228 7.1 External Devices 230 7.2 I/O Modules 232 7.3 Programmed I/O 235 7.4 Interrupt-Driven I/O 239 7.5 Dire* Memory Access 248 7.6 Dire* Cache Access 254 7.7 I/O Channels and Processo* 261 7.8 External Interconne*ion Standards 263 7.9 IBM zEnterprise EC12 I/O Stru*ure 266 7. Key Terms, Review Questions, and Problems 270 Chapter.8 Oper*ing System Support 275 8.1 Oper*ing System Overview 276 8.2 Scheduling 287 8.3 Memory Management 293 8.4 Intel x86 Memory Management 304 8.5 Arm Memory Management 309 8.6 Key Terms, Review Questions, and Problems 314 PART THREE ARITHMETIC AND LOGIC 318 Chapter.9 Number Systems 318 9.1 The Deci*l System 319 9.2 Positional Number Systems 320 9.3 The Binary System 321 9.4 Converting Between Binary and Deci*l 321 9.5 Hexadeci*l Not*ion 324 9.6 Key Terms and Problems 326 Chapter. Computer Arit*etic 328 .1 The Arit*etic and Logic Unit.329 .2 Integer Represent*ion 330 .3 Integer Arit*etic 335 .4 Flo*ing-Point Represent*ion 350 .5 Flo*ing-Point Arit*etic 358 .6 Key Terms, Review Questions, and Problems 367 Chapter.11 Digital Logic 372 11.1 Boolean Algebra 373 11.2 G*es 376 11.3 Combin*ional Circuits 378 11.4 Sequential Circuits 396 11.5 Program*ble Logic Devices 405 11.6 Key Terms and Problems 409 PART FOUR THE CENTRAL PROCESSING UNIT.412 Chapter.12 Instru*ion Sets: Chara*eristics and Fun*ions 412 12.1 Machine Instru*ion Chara*eristics 413 12.2 Types of Operands 420 12.3 Intel x86 and ARM D*a Types 422 12.4 Types of Oper*ions 425 12.5 Intel x86 and ARM Oper*ion Types 438 12.6 Key Terms, Review Questions, and Problems 446 Appendix 12A Little-, Big-, and Bi-Endian 452 Chapter.13 Instru*ion Sets:Addressing Modes and For*ts 456 13.1 Addressing Modes 457 13.2 x86 and ARM Addressing Modes 463 13.3 Instru*ion For*ts 469 13.4 x86 and ARM Instru*ion For*ts 477 13.5 Assembly Language 482 13.6 Key Terms, Review Questions, and Problems 484 Chapter.14 Processor Stru*ure and Fun*ion 488 14.1 Processor Organiz*ion 489 14.2 Register Organiz*ion 491 14.3 Instru